(a) Field of the Invention
The present invention relates to an oscillation circuit having a current-controlled phase shift circuit and, more particularly, to an improvement in a current-controlled phase shift circuit combined with a feedback circuit including a quartz resonator, for use in recovering a subcarrier for a color signal.
(b) Description of Related Art
An oscillation circuit is generally used for a television set, a video tape recorder etc. implemented, for example, by an integrated circuit. Referring to FIG. 1, there is shown a conventional oscillation circuit comprising a current-controlled phase shift circuit 20 which amplifies a first signal e1 input through an input terminal 1 and outputs an output signal e5 through an output terminal 2 while shifting the phase of the first signal e1 in accordance with control signals supplied to control terminals 12 and 13. The oscillation circuit also includes a feedback circuit 21 connected between the output terminal 2 and the input terminal 1 of the current-controlled phase shift circuit 20 to receive the signal e5 from the phase shift circuit 20 through a terminal 3 and feed the first signal e1 back to the input terminal 1 of the current-controlled phase shift circuit 20 through a terminal 4.
The current-controlled phase shift circuit 20 comprises a voltage source E1 having a positive terminal connected to the input terminal 1 via a resistor R2, a phase shift circuit 10 or phase delay circuit which receives first signal e1 input to the input terminal 1 and outputs signal e2 having a phase delay relative to the phase of signal e1 by 90.degree., a first limiter circuit 6 which receives signal e2 from the phase delay circuit 10 and outputs a first current signal i1 after amplifying and limiting the amplitude of signal e2, a second limiter circuit 11 which also receives the first signal e1 and outputs a second current signal i2 having a polarity and an amplitude which are controlled in accordance with the control current signals supplied through control terminals 12 and 13, a resistor R3 having a first terminal connected to both the outputs of the first and second limiter circuits 6 and 11 at node n1 and a second terminal connected to power supply line Vcc, and an output section 7 implemented as an amplifier which has an input connected to node n1 and an output connected to the output terminal 2 of the current-controlled phase shift circuit 20.
The first signal e1 supplied to the input terminal 1 of the current-controlled phase shift circuit 20 is biased by a DC bias voltage supplied from the voltage source E1 through resistor R2, then supplied to the input of the phase delay circuit 10 and the input of the second limiter circuit 11.
Referring to FIG. 2, the phase delay circuit 10 in FIG. 1 comprises a first low-pass filter 1005 formed by a resistor R12 and a capacitor C6, a first buffer amplifier 1003 for driving the low-pass filter 1005, a second low-pass filter 1006 formed by a resistor R13 and a capacitor C7, and a second buffer amplifier 1004 for eliminating interference between the first and the second low-pass filters 1005 and 1006. The overall characteristic of the phase shift circuit 10 from the input terminal 1001 to the output terminal 1002 thereof is that of a second order low-pass filter. The resistance of resistor R12 is selected equal to the resistance of resistor R13, while the capacitance of capacitor C6 is selected equal to the capacitance of capacitor C7. Also, the gains of the buffer amplifiers 1003 and 1004 are both set at 1. Accordingly, the transfer function A(.omega.) of the phase delay circuit 10 is expressed by the following equation (1): ##EQU1## wherein .omega. represents an angular frequency of the input signal, and .omega..sub.o represents a natural angular frequency of the phase delay circuit and is expressed as: EQU .omega..sub.o =(2.pi..multidot.C6.multidot.R12).sup.-1 =(2.pi..multidot.C7.multidot.R13).sup.-1.
From equation (1), the amplitude characteristic 20.multidot.log A(.omega.) and the phase characteristic .angle.A(.omega.) of the transfer function A(.omega.) are obtained as follows: EQU 20.multidot.log.vertline.A(.omega.).vertline.=20.multidot.log(1+.omega..sup .2 /.omega..sub.o.sup.2) (2) EQU .angle.A(.omega.)=-2.multidot.tan.sup.-1 (.omega./.omega..sub.o).(3)
FIGS. 3 and 4 show the characteristics of transfer function A(.omega.) represented by equations (2) and (3) in the vicinity of .omega./.omega..sub.o =1. As shown in FIG. 4, the phase delay circuit 10 functions for phase shifting of -90.degree. when the ratio .omega./.omega..sub.o is 1, i.e., when the angular frequency .omega. is equal to the natural angular frequency .omega..sub.o. As shown in FIG. 3, the amplitude of the output signal decreases by about 6 dB when the angular frequency .omega. is equal to the natural angular frequency .omega..sub.o as compared to the case of a DC signal. Output signal e2 from the phase delay circuit 10 is supplied to the first limiter circuit 6, as shown in FIG. 1.
Referring to FIG. 5, the first limiter circuit 6 is implemented by a differential amplifier formed by transistors Q3 and Q4 and a constant current source 11. The base and collector of transistor Q3 are connected to an input terminal 601 and an output terminal 602, respectively. The collector of transistor Q4 is connected to power supply line Vcc while the base thereof is connected to the positive electrode of voltage source E4, the negative electrode of which is grounded. The emitters of transistors Q3 and Q4 are connected with each other, and the current source I1 is connected between the connected emitters and ground. The voltage of the voltage source E4 connected to the base of transistor Q4 is set equal to the voltage of the voltage source E1 which supplies the DC bias voltage to the input terminal 1 of the current-controlled phase shift circuit 20. With this structure, the DC bias voltage biasing signal e2, which is supplied from the phase shift circuit 10 through terminal 601, is cancelled so that the differential amplifier operates in accordance only with signal e2.
Since the amplitude of the output signal e2 from the phase shift circuit 20 is set so that the differential amplifier formed by transistors Q3 and Q4 functions for a complete switching operation, the collector current of transistor Q3 output through terminal 602 has a rectangular waveform with an amplitude I1 at any time, even when the amplitude of signal e2 varies to some extent. The amplitude of the fundamental wave component i1 of the rectangular wave current depends only on the amplitude of the rectangular wave current, and is therefore determined by the current supplied from the current source I1 regardless of the amplitude of signal e2. Accordingly, the amplitude A.sub.i1 of the fundamental wave component i1 of the rectangular wave current is constant and expressed as follows: ##EQU2## Moreover, the fundamental wave component i1 is opposite in phase with respect to signal e2, with the direction of current flowing out of terminal 602 being positive.
Referring to FIG. 6, the second limiter circuit 11 comprises a first differential amplifier formed by transistors Q5 and Q6, and a second differential amplifier formed by transistors Q7 and Q8. Both of the base of transistor Q5 and the base of transistor Q8 are connected to an input terminal 1101, both of the collector of transistor Q6 and the collector of transistor Q8 are connected to an output terminal 1102, and both of the collector of transistor Q5 and the collector of transistor Q7 are connected to power supply line Vcc. A node n2 connecting the emitters of transistors Q5 and Q6 with each other is connected to a first control terminal 1103, while a node n3 connecting the emitters of transistors Q7 and Q8 with each other is connected to a second control terminal 1104. A voltage source E5 is connected between a node n4 connecting the bases of transistors Q6 and Q7 with each other and ground.
Since the voltage of the voltage source E5 connected to the bases of transistors Q6 and Q7 is set equal to the voltage of the voltage source E4 in the first limiter circuit 6, the DC bias voltage biasing the first signal e1, which is input to terminal 1101, is cancelled so that the differential amplifier operates in accordance only with the first signal e1. Since the amplitude of signal e1 is greater than that of signal e2, the differential amplifiers formed by transistors Q5 and Q6 and by transistors Q7 and Q8, respectively, function for a complete switching operation, similarly to the first limiter circuit 6. The node n2 is supplied with a first control current I3 via control terminal 12, while the node n3 is supplied with a second control current I4 via a second control terminal 13. Similarly to the first limiter circuit 6, the amplitude A.sub.i2 of the fundamental wave component i2 of collector current flowing from the collectors of transistors Q6 and Q8 can be expressed in terms of the control currents I3 and I4 as follows: EQU A.sub.i2 =2.multidot.(I3-I4)/.pi.. (5)
Here, the control currents I3 and I4 can be expressed as I3=K.multidot.I1, I4=(1-K).multidot.I1 wherein K is a parameter (0&lt;K&lt;1), indicating that the control currents I3 and I4 are controlled according to the parameter K. From these relationships, equation (5) can be rewritten as follows: EQU A.sub.i2 =2.multidot.(2K-1).multidot.I1/.pi.. (6)
The right-hand side of equation (6) is negative when the inequality 0&lt;K&lt;1/2 holds. In such a case, the phase of the fundamental wave component i2 of the second current signal I2 is reversed from the phase of first signal e1. In the case where the inequality 1/2&lt;K&lt;1 holds, the fundamental wave component i2 is in phase with first signal e1.
Fundamental wave components i1 and i2 of output current I1 from the first limiter circuit 6 and output current I2 from the second limiter circuit 11 are directly added together, and the resultant current signal is then converted to a voltage signal by a resistor R3. The voltage signal is output from output terminal 2 of the current-controlled phase shift circuit 20 as an output signal e5 via the output amplifier 7 having a gain of 1, then input to the input terminal 3 of the feedback circuit 21.
The feedback circuit 21 comprises a series circuit of resistor R1 and quartz resonator X connected between input terminal 3 and output terminal 4 of the feedback circuit 21, and a capacitor C1 connected between output terminal 4 of the feedback circuit 21 and ground. The transfer function H(.omega.) of the feedback circuit 21 has the characteristics shown in FIGS. 7 and 8 in the vicinity of the serial resonance angular frequency .omega..sub.S peculiar to the quartz resonator X and the parallel resonance angular frequency .omega..sub.P slightly higher than .omega..sub.S. FIG. 7 shows the phase characteristic .angle.H(.omega.) of the feedback circuit 21 as a function of angular frequency. In the vicinity of .omega..sub.S at which the phase delay is 90.degree., the phase of the output signal varies linearly with respect to variation in angular frequency .omega.. The term "angular frequency" will be called merely "frequency" hereinafter for the sake of simplification.
FIG. 8 shows the amplitude characteristic of the feedback circuit 21 as a function of frequency. As shown in FIG. 8, a band-pass characteristic is obtained in the feedback circuit 21 wherein the transfer gain 20.multidot.log H(.omega.) reaches a maximum in the vicinity of .omega..sub.S. The frequencies .omega..sub.S and .omega..sub.P are very close to each other so that expression (.omega..sub.P -.omega..sub.S)/.omega..sub.S assumes a value around 10.sup.-3. When the natural frequency .omega..sub.o of the phase delay circuit 10 is selected equal to the series resonace frequency .omega..sub.s, the output of the phase shift circuit 10 exhibits a substantially constant phase delay of -90.degree. in the narrow frequency range between .omega..sub.S and .omega..sub.P. In other words, the phase of signal e2 is delayed by 90.degree. relative to signal e1 in FIG. 1. The phase of the fundamental wave component i1 from the first limiter circuit 6 leads by 90.degree. from the phase of signal e1, since the fundamental wave component i1 is opposite in phase with respect to the phase of signal e2. From equation (6), it is understood that the fundamental wave component i2 is opposite in phase with respect to signal e1 when the inequality 0&lt;K&lt;1/2 holds, and is in phase with respect to signal e1 when the inequality 1/2&lt;K&lt;1 holds. In addition, the absolute value of the fundamental wave component i2 does not exceed the fundamental wave component i1 as expressed by equation (4).
With the characteristics as described above, it is possible to shift the phase of signal e5 (=i1.multidot.R3+i2.multidot.R3), which is obtained by summing the components i1 and i2 and converting the resultant sum to a voltage signal by resistor R3 and which is output through the output terminal 2, from the phase of signal e1, by an angle from +45.degree. through 90.degree. to +135.degree., in accordance with the parameter K. The phase relationship among the signals e1, e2 and e5 is shown in FIG. 9, wherein the phase of signal e1 is shown as 0.degree.. Since the parameter K varies in accordance with control currents supplied through control terminals 12 and 13, the current-controlled phase shift circuit 20 can lead the phase of output signal e5, with respect to the phase of input signal e1, within the angle range between +45.degree. and +135.degree., as shown by broken lines in FIG. 9.
According to the frequency-amplitude characteristic of the feedback circuit 21 shown in FIG. 8, the gain in terms of ratio of output signal at the output terminal 4 of the feedback circuit 21 to input signal at the input terminal 1 of the current-controlled phase shift circuit 20 is selected at a large value in a selected frequency range between .omega.- and .omega.+. Accordingly, a positive feedback signal having an amplitude sufficient for starting an oscillation in the oscillation circuit is input to the current-controlled phase shift circuit 20 from the output terminal 4 of the feedback circuit 21, provided that the signal frequency lies in the range between .omega.- and .omega.+.
On the other hand, the frequency at which output signal of the positive feedback signal remains in phase with input signal thereof is selected as an oscillation frequency at one point within the frequency range between .omega.- and .omega.+, the oscillation frequency being determined in accordance with the phase of output signal from the current-controlled phase shift circuit 20 and the frequency-phase characteristic of the feedback circuit 21 shown in FIG. 7. Accordingly, oscillation is started at the selected frequency point by the function of the positive feedback loop circuit formed by the feedback circuit 21 and the current-controlled phase shift circuit 20. Hence, the conventional oscillation circuit shown in FIG. 1 acts as an oscillation circuit capable of varying the oscillation frequency within the range between .omega.- and .omega.+ in accordance with currents supplied through control terminals 12 and 13.
In the conventional oscillation circuit as described above, the phase delay circuit 10 for obtaining a phase delay of 90.degree. is implemented by a secondary order low-pass filter in which time constant is set so that a phase delay of 90.degree. is selected at the series resonance frequency of the quartz resonator X in the feedback circuit 21 outside the phase shift circuit. As a result, if the quartz resonator X is replaced by another quartz resonator having a different natural frequency so as to alter the oscillation frequency, the phase delay obtained by the low-pass filter is not 90.degree. at the series resonance frequency of the new quartz resonator, so that the variable range of the output of the current-controlled phase shift circuit 20 deviates from the range between +45.degree. and +135.degree.. Accordingly, the frequency at which input of the current controlled phase shift circuit 20 remains in phase with the output of the feedback circuit 21 deviates from the frequencies at which the feedback circuit 21 exhibits the band-pass characteristic. Hence, the gain of the positive feedback loop formed by the current-controlled phase shift circuit 20 and the feedback circuit 21 decreases, whereby the oscillation of the oscillation circuit is possibly stopped.
In addition, since the time constant of the phase shift circuit 10 is determined by resistors and capacitors implemented in a semiconductor integrated circuit, the phase delay obtained by the phase delay circuit 10 varies due to variations in the resistances of resistors and the capacitances of the capacitors even if the phase delay circuit 10 is designed to have an exact phase delay of 90.degree. at the series resonance frequency of the quartz resonator X. As a result, control characteristics regarding the phase of output of the current control phase shift circuit 20 is varied. Accordingly, the frequency at which the input of the current-controlled phase shift circuit 20 remains in phase with the output of the feedback circuit 21 varies, resulting in variation of the oscillation frequency.